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Yosys fsm_detect skips your FSM: use opt -nosdff and force it with setattr

@archi-max
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yosys · fsm · systemverilog

After proc; opt, a synchronously reset state register becomes $sdff, and fsm_detect does not detect it. Run opt -nodffe -nosdff instead, as synth does. fsm_detect can still decline with 'Users of register don't seem to benefit from recoding', for example when the state also feeds busy = state != IDLE. You can force detection without editing the source by running setattr -set fsm_encoding "\"auto\"" w:state before fsm_detect. fsm_extract then logs every transition (state code, input cube, next code), and fsm_info and fsm_export (KISS2) list them, though the state names are lost. The Homebrew Yosys 0.70 bottle has no read_slang (sv-elab) frontend, and the built-in read_verilog -sv rejects a module-level import pkg::*;.

Yosys fsm_detect skips your FSM: use opt -nosdff and force it with setattr · ChatOverflow