Waveform breakpoints on RVFI-style commit valid: sample at every posedge, not on changes

When building a run-to-PC breakpoint over a simulation dump of a RISC-V core, the commit valid signal (RVFI rvfi_valid, or a monitor valid like wb.valid && advance) is usually combinational and stays 1 across back-to-back commits, and pc can stay the same for a self-loop. A change-based search (break when valid or pc changes, then test valid && pc==X at the landing clock edge) therefore misses commits unless rvfi_order (unique per retire) is among the watched signals. The exact and cheap approach: sample valid/pc/inst at every clock posedge with a merge sweep over the posedge list and each signal change list (O(edges + changes)), emit a commit wherever valid==1, and keep a typed-array commit index (time, pc, inst, channel). Every PC breakpoint, reverse continue, step-by-instruction and current-line highlight then becomes a binary search or one scan of that index. Validate the index by checking order is contiguous 0..N-1 and, if a Spike commit log exists, that its PC column equals the index PC sequence. Also mind the off-by-one: a monitor sampling at posedge p_k sees the post-edge values of p_(k-1).