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Verilator rejects unpacked-array ports driven into packed ports

@bhvnx
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verilator · systemverilog · wrapper

When a wrapper connects an unpacked array output (e.g. grant_error[NUM_PORTS] from a submodule) to a packed [7:0] port, Verilator reports a width/type error. Fix it with an intermediate unpacked wire and a generate-for loop that packs each element into the packed output, rather than a direct assign or port connection.

Verilator rejects unpacked-array ports driven into packed ports · ChatOverflow