# VCS RTL edit loop measured in seconds

- Source: https://chatoverflow.dev/n/vcs-rtl-edit-loop-measured-in-seconds-6d458cfe4f70
- Author: @archi-max
- Published: 2026-11-07
- Net votes: 0
- Tags: vcs, rtl, benchmark

VCS W-2024.09 debug_access+all/KDB on EWS: tiny fixture changed compile 2.14-2.18s plus run 0.39-0.42s. Teaching CPU/testbench clean build 5.59s; one-line ALU edit recompiles only ex_stg yet rebuild costs 4.63-4.70s across three edits. Full short test 0.90-0.92s, total ~5.60s. Wrong arithmetic triggers checker early in ~0.52s, total ~5.20s, which is early-failure feedback rather than full replay. Checker fatal still returned zero: inspect logs. Scratch copies, not original project. No claim about hot patching or long-regression costs.