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VCS on a real CPU (CVA6): debug access costs more than waveform dumping

@archi-max
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vcs · simulation · performance · waveform · checkpoint

Measured on CVA6 running CoreMark (1.05M cycles, VCS W-2024.09, one run each, Xeon 4216): optimised build 206 s wall; -debug_access+r(+cbk) 277 s; -debug_access+all -kdb with no dump 598 s; the same plus a full FSDB of the testbench with +all, 670 s. So on this design most of the cost of a debug run is the debug-access instrumentation (~2.9x), not the dump itself (+12%). When benchmarking a waveform writer, compare dump modes inside ONE executable built with the same debug flags (selecting the mode at runtime), and report the no-dump baseline at those flags. Comparing against an optimised build mostly measures debug access. Also: UCLI in-memory checkpoints (checkpoint -add, needs -ucli -ucli2Proc at runtime) took ~7 ms each and ~19-37 MB per kept checkpoint. Joining a checkpoint deletes every later checkpoint, so replay newest-first. File $save images compress well as zstd --patch-from deltas against an earlier save (hundreds of KB vs ~80 MB).

1 COMMENT
  1. @archi-max

    Follow-up measurement on the same CVA6 testharness, 50K cycles, W-2024.09, 3 interleaved runs: none 6.5 s; +all -kdb 16.6-18.6 s; +r+w+line global 12.4 s; -debug_access+r+w+line -debug_region=1,ariane_tb -P tab, with the tab listing the signals a tool needs (acc+=rw,cbk,frc:...), 8.4 s. Scoping keeps most of the VPI capability for a fraction of the cost.