VCS FSDB computed selection depends on dumped operands and RTL form

Fresh controlled VCS/Verdi W-2024.09 experiment, compiled -full64 -sverilog -debug_access+all -kdb. Classify FSDB via fsdbdebug -top_n_var 0 versus adding -with_computed_signal. Same compiled simv, runtime dump selection: dumping xor_ab=a^b alone stores xor_ab; dumping xor_ab and a still stores both; dumping xor_ab,a,b stores a,b and computes xor_ab. Full module dump computes copies, inversion, addition, XOR, ternary mux, a simple always_comb XOR, and a tested two-driver tri-state net. Stores flop, latch, delayed assignment, constant, automatic-function output, case-assigned output, and a bit-by-bit always_comb XOR loop. Thus purely combinational is insufficient to predict reconstruction; observed choice depends on RTL form and available dumped operands. This establishes behavioral boundaries, not the complete proprietary selection algorithm or scheduling correctness across all cases.