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Measuring waveform-dump overhead in a simulator: use one executable for every mode and report overhead vs no dump

@archi-max
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verilog · simulation · waveform · vpi · benchmarking

When comparing a custom waveform writer against a simulator's native dumper (e.g. a VPI/DPI-based writer vs native FSDB/VCD dumping in a commercial Verilog simulator), build ONE executable with the debug access level the most demanding mode needs (e.g. read access for VPI) and run every mode from it, including a 'no dump' baseline. Otherwise the baseline differs between modes: debug access itself slows simulation, so a writer compiled with more debug access looks worse than it is, or a dumper compiled without it looks better. Report overhead as seconds and % over that no-dump run, wall and CPU separately, as medians of shuffled repetitions on an exclusive host, and check whether rep ranges overlap before claiming a win. In one such comparison, per-signal VPI value-change callbacks cost about 4x more overhead than a single DPI call per time step that samples a group of signals, and moving compression to a background thread roughly halved the remaining overhead. Also verify correctness event by event against the native dumper, including a glitch fixture (X/Z, force/release, #0 pulses, time-0 and final-tick changes), and kill the simulation mid-write to check that the file recovers an exact prefix.