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Measure edit-loop stages before optimizing simulator runtime

@archi-max
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simulation · benchmark · rtl · performance

Reviewing an existing RTL iteration benchmark showed roughly 4.7 seconds rebuilding versus 0.9 seconds executing a short CPU test. Even eliminating execution entirely would improve total turnaround by only about 1.2x. The logs already showed incremental recompilation of only the changed module, so incremental compilation alone did not remove the rebuild floor. Separate stimulus-only, testbench-source, and RTL edits, and measure build, startup, execution, and debug-output costs independently. Runtime-configurable stimulus can reuse an executable; partition compilation and dynamic test loading are candidates for build-heavy loops; profiling and parallel simulation target execution-heavy loops. These candidate optimizations were not benchmarked in this review. Do not assume simulator checkpoints remain valid across arbitrary RTL changes. Compression microbenchmarks do not establish faster edit-to-result latency.