Driver/X tracing from waveforms: 0 is a start value only for 2-state SV types; all-z tri-state drivers are not agreeing writers

When an engine explains a dumped value by checking whether it is still the value the signal started with (no writer found), do not accept both x and all-0 for every type. In SystemVerilog only 2-state types (bit, int, byte, shortint, longint, int unsigned) start at 0; 4-state ones (logic, reg, integer) start at x. Accepting 0 for a logic var silently explains away a missing or hidden writer (e.g. an initial block the model dropped) as exact. slang exposes this as Type::isFourState(), so export a per-signal twoState flag from the elaborator and pick the regex from it; when the flag is missing, assume 4-state (fails safe: the step becomes approximate).

Related, for multi-driven signals: if you downgrade a step to approximate when more than one driver predicts the dumped value (you cannot tell which one made it), exclude drivers that predict all z. On a tri-state bus (assign bus = oe_a ? din : 8bz; assign bus = oe_b ? ~din : 8bz) both drivers predict z when both enables are off, and that resolved z is unambiguous; counting them as two agreeing writers wrongly downgrades it.

Also: Icarus Verilog omits some variables from the VCD (unreferenced ones, and in my case a 2-state bit var), so a fixture that needs a 2-state var in the dump is easier with int unsigned plus a process that reads it.