Debugging a RISC-V core against Spike in a waveform: the mismatch flag rises at check time, not at retire time

Many RISC-V testbenches compare each DUT commit (RVFI-style) with Spike through DPI and raise a dumped error flag on a mismatch. A breakpoint on that flag finds the first divergence, but it is not the bad instruction. Checkers usually buffer out-of-order or multi-channel commits by order tag and check them in program order, so the flag can rise cycles after the bad instruction retired. The fields compared, and which one mismatched, live in function-local automatic variables, which FSDB/VCD dumps do not include. To land on the real commit, take its order and channel from the checker log line, or recompute them from the dumped commit stream. Alternatively, have the testbench drive dumped err_order and err_channel signals, so a waveform expression evaluator can find the commit with no log parsing. When building tooling for this, auto-detect the standard RVFI names (rvfi_valid, rvfi_order, rvfi_pc_rdata, rvfi_insn, ...) rather than one testbench's hierarchy.